This disclosure relates generally to the field of timing control and, more specifically, to systems and methods for synchronizing clock signals between computer devices connected across a computer network.
For devices connected across a network, precise time synchronization is difficult to achieve. With mechanisms like IEEE 802.1 AS/D5.0 standard entitled “Timing and Synchronization for Time-Sensitive Application in Bridged Local Area Networks” published on Feb. 26, 2009, the standard network elements of such a system can maintain precise time synchronization. However, synchronizing between different networks and other interconnect technologies can only be done through software mechanisms. Because precise time control of software operations is not supported on most CPU architectures, and because software communication over Peripheral Component Interconnect Express (PCIe) uses Transaction Layer Packets (TLPs) which are subject to queuing delays and other non-deterministic (at least from the software point of view) delays, it is not possible to control the component communication latencies. This reduces the accuracy considerably, to the point that some applications cannot be supported at acceptable quality levels (e.g., multichannel audio), and it obviously requires specific system software support, which is less desirable than a hardware solution.
What is needed is a hardware mechanism that allows device connected through a PCIe or PCIe derived architecture (such as DMI (Direct Media Interface)) to be synchronized in time.